1. Field of the Invention
The present invention relates to a receiver for a digital HDTV signal having successive data frames each of which has successive data segments, each segment including a series of data symbols, successive data symbols in each segment being interleaved and trellis encoded in accordance with a multi-level constellation of permissible code values. More particularly, the invention relates to a trellis decoder for decoding trellis encoded interleaved data symbols in a received data stream.
Such a trellis encoded interleaved format has recently been adopted by the Federal Communications Commission as an HDTV broadcasting standard in the United States.
2. Description of the Related Art
After years of intensive cooperative effort by the television industry, as represented by the Digital HDTV Grand Alliance (GA) of leading manufacturing and research organizations in that field, the GA developed and submitted to the FCC Advisory Committee on Advanced Television Service a proposed standard documenting a digital HDTV system. Such standard (the "GA standard"), with little change, has now become the official FCC broadcasting standard for HDTV.
It calls for 2-bit data symbols of the HDTV signal to be trellis encoded in accordance with an 8-level (3 bit) one-dimensional constellation. One bit of each data symbol is precoded, and the other is subjected to a 1/2 encoding rate which produces two coded bits in accordance with a 4-state trellis code. For purposes of interleaving, twelve identical encoders and precoders operate successively on every twelve successive data symbols. Symbols 0, 12, 24, 36 . . . are encoded as one series; symbols 1, 13, 25, 27 . . . as a second series; symbols 2, 14, 26, 38 . . . as a third series; and so on for a total of 12 series. It is suggested, therefore, in the GA standard, that 12 trellis decoders will also be required in the receiver for the 12 series of time division interleaved data symbols in the signal, each decoder decoding every 12th in the stream of coded data symbols.
Each of the decoders for the 4-state trellis code will operate in accordance with the well-known Viterbi decoding algorithm and so typically involves three separate units: a branch metric calculator unit, an add-compare-select unit, and a path-memory unit. See, for example, "Trellis-coded Modulation With Redundant Signal Set, Part I; Introduction, Part II: State of the Art", G. Ungerboeck, IEEE Communications Magazine, Vol. 25, pp. 5-21, February 1987. However, if twelve decoders are to be provided the resulting complete decoder circuitry is quite extensive and would occupy considerable space on an integrated circuit chip.